multidimensional-array - 是否可以在 VHDL 中将端口声明为未知大小的二维矩阵？

Question

我需要在不知道其大小的情况下处理输入端口。下面是我的代码。因为我是 vhdl 的初学者，所以我对这种语言感到困惑。我正在尝试使用 Aldec Riviera Pro 2020.04 模拟器在在线游乐场上编写代码。

library IEEE;
use IEEE.numeric_std.all;

PACKAGE vsd is
TYPE array_2d is array(natural<>,natural<>) of INTEGER;
END PACKAGE;

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use work.vsd.all;

entity my_conv is
port(
    in_signal : in array_2d;
    conv_signal : in array_2d;
    result : out array_2d
);
end my_conv;
architecture arc of my_conv is
function conv_fn (conv_m, conv_n,indis_m, indis_n : natural) return INTEGER is
variable sum : INTEGER := 0;
begin
    for i in conv_m-1 downto 0 loop 
        for j in conv_n-1 downto 0 loop
            sum := sum + in_signal(i,j) * conv_signal(indis_m-i,indis_n-j);
        end loop;
    end loop;
    return sum;
end conv_fn;
VARIABLE var_conv_m, var_conv_n, var_in_m, var_in_n : INTEGER;

VARIABLE temp_result : array_2d;
BEGIN

    var_conv_m := conv_signal'length(1);
    var_conv_n := conv_signal'length / var_conv_m;
    for i in var_conv_m-1 downto 0 loop
        for j in var_conv_n-1 downto 0 loop
            temp_result(i,j) := conv_fn(var_conv_m,var_conv_n,i,j);
        end loop;
    end loop;
    result := temp_result;

END arc;

标签： multidimensional-arrayvhdl