时间戳

首页 > 解决方案 > 在“S1”附近：(vcom-1576) 期待 BEGIN

vhdl - 在“S1”附近：(vcom-1576) 期待 BEGIN

问题描述

你好我是modelsim的新手，我不知道如何正确使用它，我弹出这个错误。

near "S1": (vcom-1576) expecting BEGIN.

- -代码 - -

LIBRARY ieee;
USE ieee.std_logic_1164.all;

entity test_mux is 
end test_mux;


architecture test_b of test_mux is
signal A1, B1: std_logic_vector(2 downto 0);
 S1: std_logic;
 D1: std_logic_vector(2 downto 0);
component mux_double_2to1 port (a, b, s: in bit; d: out bit);
end component; 
begin 
M1: mux_double_2to1 PORT MAP (a=>A1,b=>B1,s=>S1,d=>D1);
process
begin
A1 <= '001';B1 <= '010';S1 <= '0'; wait for 20 ps;
A1 <= '010';B1 <= '100';S1 <= '0'; wait for 20 ps;
A1 <= '111';B1 <= '011';S1 <= '0'; wait for 20 ps;
A1 <= '101';B1 <= '111';S1 <= '0'; wait for 20 ps; 
A1 <= '010';B1 <= '001';S1 <= '1'; wait for 20 ps;
A1 <= '000';B1 <= '101';S1 <= '1'; wait for 20 ps; 
A1 <= '101';B1 <= '010';S1 <= '1'; wait for 20 ps;
A1 <= '111';B1 <= '101';S1 <= '1'; wait for 20 ps;  
end process; 
end test_b;

- -实体 - -

LIBRARY ieee;
USE ieee.std_logic_1164.all;

entity mux_double_2to1 is port(
     a, b: in std_logic_vector(2 downto 0); 
     s: in std_logic;
     d: out std_logic_vector(2 downto 0));
end mux_double_2to1;

实体也成功编译。我该怎么办？谁能帮我？

标签： vhdlmodelsim

解决方案

你好，我学校的人帮我解决了我的问题，所以这是完整的解决方案。感谢任何试图帮助我的人。我很感激

LIBRARY ieee;
USE ieee.std_logic_1164.all;

entity test_mux is 
end test_mux;
architecture test_b of test_mux is
signal A1, B1, D1: std_logic_vector(2 downto 0);
signal S1: std_logic;
component mux_double_2to1 port (a, b, d: in std_logic_vector(2 downto 0); s: out std_logic);
end component; 
begin 
M1: mux_double_2to1 PORT MAP (a=>A1,b=>B1,s=>S1,d=>D1);
process
begin
A1 <= "001";B1 <= "010";S1 <= '0'; wait for 20 ps;
A1 <= "010";B1 <= "100";S1 <= '0'; wait for 20 ps;
A1 <= "111";B1 <= "011";S1 <= '0'; wait for 20 ps;
A1 <= "101";B1 <= "111";S1 <= '0'; wait for 20 ps; 
A1 <= "010";B1 <= "001";S1 <= '1'; wait for 20 ps;
A1 <= "000";B1 <= "101";S1 <= '1'; wait for 20 ps; 
A1 <= "101";B1 <= "010";S1 <= '1'; wait for 20 ps;
A1 <= "111";B1 <= "101";S1 <= '1'; wait for 20 ps;  
end process; 
end test_b;

推荐阅读